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ltc 4088-1/ ltc 4088-2 1 40881fc typical a pplica t ion fea t ures descrip t ion high effciency battery charger/usb power manager with regulated output voltage the lt c ? 4088-1/ltc4088-2 is a high efficiency usb powerpath? controller and li-ion/polymer battery char- ger. it includes a synchronous switching input regulator, a full-featured battery charger and an ideal diode. de- signed specifically for usb applications, the ltc4088-1/ ltc4088-2s switching regulator automatically limits its input current to either 100 ma , 500 ma or 1 a via logic control. the ltc4088-1 powers-up with the charger off; the ltc4088-2 powers-up with the charger on. the switching input stage provides power to v out where power sharing between the application circuit and the battery charger is managed. charge current is automati- cally reduced to maintain a regulated 3.6 v v out during low-battery conditions. as the battery is charged, v out tracks v bat for high efficiency charging. this feature al- lows the ltc4088-1/ltc4088-2 to provide more power to the application and eases thermal issues in constrained applications. an ideal diode ensures that system power is available from the battery when the input current limit is reached or if the usb or wall supply is removed. the ltc4088-1/ltc4088-2 is available in the low profile 14-lead 4mm 3mm 0.75 mm dfn surface mount package. a pplica t ions n switching regulator makes optimal use of limited power a vailable from usb port to charge battery and power application n 180m internal ideal diode plus external ideal diode controller seamlessly provide low loss power path when input power is limited or unavailable n automatic charge current reduction maintains 3.6v minimum v out n full featured li-ion/polymer battery charger n v bus operating range: 4.25v to 5.5v (7v absolute maximumtransient) n 1.2a maximum input current limit n 1.5a maximum charge current with thermal limiting n bat-track? adaptive output control n slew control reduces switching emi n low profile (0.75mm) 14-lead 4 mm 3mm dfn package n media players n digital cameras n gps n pdas n smart phones high efficiency battery charger/usb power manager switching regulator efficiency to system load (p out /p bus ) v bus v out 10f wall usb 0.1f 10f system load 2.94k 499 408812 ta01a clprog 8.2 prog ltc4088-1/ltc4088-2 c/x gnd sw 3.3h ntc d0 d1 d2 chrg v outs gate bat + li-ion i out (a) 0.01 0 efficiency (%) 20 40 60 80 0.1 1 408812 ta01b 100 10 30 50 70 90 bat = 4.2v bat = 3.3v v bus = 5v i bat = 0ma 10x mode l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks and powerpath and bat-track are tradmearks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 6522118.
ltc 4088-1/ ltc 4088-2 2 40881fc p in c on f igura t ion a bsolu t e maxi m u m r a t ings v bus ( transient ) t < 1 ms, duty cycle < 1% .. C 0.3 v to 7v v bus ( static ), bat , chrg , ntc, d 0, d 1, d2 .......................................................... C 0.3 v to 6v i clprog .................................................................... 3 ma i prog , i c/x ................................................................ 2 ma i chrg ...................................................................... 75 ma i out ............................................................................. 2a i sw .............................................................................. 2a i bat ............................................................................. 2a ma ximum operating junction temperature .......... 12 5 c operating temperature range ................. C 40 c to 85 c storage temperature range .................. C 65 c to 125 c (note 1) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 d1 d0 sw v bus v out bat gate ntc clprog v outs d2 c/x prog chrg top view 15 de package 14-lead (4mm 3mm) plastic dfn t jmax = 125c, ja = 37c/w exposed pad (pin 15) is gnd, must be soldered to pcb o r d er i n f or m a t ion lead free finish tape and reel part marking package description temperature range ltc4088ede-1#pbf ltc4088ede-1#trpbf 40881 14-lead (4mm x 3mm x 0.75mm) plastic dfn C40c to 85c ltc4088ede-2#pbf ltc4088ede-2#trpbf 40882 14-lead (4mm x 3mm x 0.75mm) plastic dfn C40c to 85c consult lt c marketing for parts specified with wider operating temperature ranges. consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part markings, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ symbol parameter conditions min typ max units input power supply v bus input supply voltage l 4.35 5.5 v i bus(lim) total input current 1x mode 5x mode 10x mode low power suspend mode high power suspend mode l l l l l 92 445 815 0.32 1.6 97 470 877 0.39 2.05 100 500 1000 0.5 2.5 ma ma ma ma ma i busq (note 4) input quiescent current 1x mode 5x mode 10x mode low power suspend mode high power suspend mode 6 14 14 0.038 0.038 ma ma ma ma ma h clprog (note 4) ratio of measured v bus current to clprog program current 1x mode 5x mode 10x mode low power suspend mode high power suspend mode 224 1133 2140 11.3 59.4 ma/ma ma/ma ma/ma ma/ma ma/ma e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v bus = 5v, b at = 3.8v, r clprog = 2.94k, unless otherwise noted.
ltc 4088-1/ ltc 4088-2 3 40881fc e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v bus = 5v, b at = 3.8v, r clprog = 2.94k, unless otherwise noted. symbol parameter conditions min typ max units i out v out current available before discharging battery 1x mode, bat = 3.3v 5x mode, bat = 3.3v 10x mode, bat = 3.3v low power suspend mode high power suspend mode 0.26 1.6 135 672 1251 0.32 2.04 0.41 2.46 ma ma ma ma ma v clprog clprog servo voltage in current limit 1x, 5x, 10x modes suspend modes 1.188 100 v mv v uvlo v bus undervoltage lockout rising threshold falling threshold 3.95 4.30 4.00 4.35 v v v duvlo v bus to bat differential undervoltage lockout rising threshold falling threshold 200 50 mv mv v out v out voltage 1x, 5x, 10x modes, 0v < bat 4.2v, i out = 0ma, battery charger off 3.5 bat + 0.3 4.7 v usb suspend modes, i out = 250a 4.5 4.6 4.7 v f osc switching frequency 1.8 2.25 2.7 mhz r pmos pmos on resistance 0.18 r nmos nmos on resistance 0.30 i peak peak inductor current clamp 1x, 5x modes 10x mode 2 3 a a r susp suspend ldo output resistance 15 battery charger v float bat regulated output voltage 0c t a 85c 4.179 4.165 4.200 4.200 4.221 4.235 v v i chg constant-current mode charge current r prog = 1k r prog = 5k 980 196 1030 206 1080 220 ma ma i bat battery drain current v bus > v uvlo , powerpath switching regulator on, battery charger off, i out = 0a 3.5 5 a v bus = 0v, i out = 0a (ideal diode mode) 23 35 a v prog prog pin servo voltage 1.000 v v prog,trkl prog pin servo voltage in trickle charge bat < v trkl 0.100 v h prog ratio of i bat to prog pin current 1031 ma/ma v trkl trickle charge threshold voltage bat rising 2.7 2.85 3.0 v v trkl trickle charge hysteresis voltage 135 mv v rechrg recharge battery threshold voltage threshold voltage relative to v float C80 C100 C120 mv t term safety timer termination period timer starts when v bat = v float 3.2 4.0 4.8 hour t badbat bad battery termination time bat < v trkl 0.4 0.5 0.6 hour i c/x battery charge current at programmed end of charge indication r c/x = 1k r c/x = 5k 85 100 20 115 ma ma v c/x c/x threshold voltage 100 mv h c/x battery charge current ratio to c/x 1031 ma/ma v chrg chrg pin output low voltage i chrg = 5ma 65 100 mv i chrg chrg pin input current bat = 4.5v, v chrg = 5v 0 1 a
ltc 4088-1/ ltc 4088-2 4 40881fc e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v bus = 5v, b at = 3.8v, r clprog = 2.94k, unless otherwise noted. symbol parameter conditions min typ max units r on_chg battery charger power fet on-resistance (between v out and bat ) i bat = 200ma 0.18 t lim junction temperature in constant temperature mode 110 c ntc v cold cold temperature fault threshold voltage rising threshold hysteresis 75.0 76.5 1.5 78.0 %v bus %v bus v hot hot temperature fault threshold voltage falling threshold hysteresis 33.4 34.9 1.5 36.4 %v bus %v bus v dis ntc disable threshold voltage falling threshold hysteresis 0.7 1.7 50 2.7 %v bus mv i ntc ntc leakage current v ntc = v bus = 5v C50 50 na ideal diode v fwd forward voltage detection i out = 10ma v bus = 0v, i out = 10ma 15 2 mv mv r dropout internal diode on-resistance, dropout i out = 200ma 0.18 i max diode current limit 2 a logic (d0, d1, d2) v il input low voltage 0.4 v v ih input high voltage 1.2 v i pd static pull-down current v pin = 1v 2 a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc4088e-1/ltc4088e-2 is guaranteed to meet performance specifcations from 0c to 85c. specifcations over the C 40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: the ltc4088e-1/ ltc4088e-2 includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. note 4: total input current is the sum of quiescent current, i busq , and measured current given by v clprog /r clprog ? (h clprog + 1).
ltc 4088-1/ ltc 4088-2 5 40881fc typical p er f or m ance c harac t eris t ics t a = 25c, unless otherwise noted. powerpath switching regulator efficiency vs output current battery charging efficiency vs battery voltage with no external load (p b at /p bus ) v bus current vs v bus voltage (suspend) ideal diode v-i characteristics ideal diode resistance vs battery voltage output voltage vs output current (battery charger disabled) usb limited battery charge current vs battery voltage battery drain current vs battery voltage usb limited battery charge current vs battery voltage forward voltage (v) 0 current (a) 0.6 0.8 1.0 0.16 408812 g01 0.4 0.2 0 0.04 0.08 0.12 0.20 internal ideal diode with supplemental external vishay si2333 pmos internal ideal diode only v bus = 0v v bus = 5v battery voltage (v) 2.7 resistance () 0.15 0.20 0.25 3.9 408812 g02 0.10 0.05 0 3.0 3.3 3.6 4.2 internal ideal diode with supplemental external vishay si2333 pmos internal ideal diode output current (ma) 0 output voltage (v) 4.00 4.25 4.50 800 408812 g03 3.75 3.50 3.25 200 400 600 1000 v bat = 4v v bat = 3.4v v bus = 5v 5x mode battery voltage (v) 2.7 500 600 700 3.9 408812 g04 400 300 3.0 3.3 3.6 4.2 200 100 0 charge current (ma) v bus = 5v r prog = 1k r clprog = 2.94k 5x usb setting, battery charger set for 1a battery voltage (v) 2.7 0 charge current (ma) 25 50 75 100 125 150 3.0 3.3 3.6 3.9 408812 g05 4.2 v bus = 5v r prog = 1k r clprog = 2.94k 1x usb setting, battery charger set for 1a battery voltage (v) 2.7 battery current (a) 15 20 25 3.9 408812 g06 10 5 0 3.0 3.3 3.6 4.2 v bus = 0v v bus = 5v (suspend mode) i out = 0a output current (a) 0.01 40 efficiency (%) 50 60 70 80 100 0.1 1 408812 g07 90 5x, 10x mode 1x mode v bat = 3.8v battery voltage (v) 2.7 efficiency (%) 86 88 90 3.9 408812 g08 84 82 80 3.0 3.3 3.6 4.2 r clprog = 2.94k r prog = 1k i out = 0ma 5x charging efficiency 1x charging efficiency v bus voltage (v) 1 v bus current (a) 30 40 50 5 408812 g09 20 10 0 2 3 4 6 i out = 0ma
ltc 4088-1/ ltc 4088-2 6 40881fc typical p er f or m ance c harac t eris t ics oscillator frequency vs temperature v bus quiescent current vs temperature quiescent current in suspend vs temperature battery charge current vs temperature battery charger float voltage vs temperature low-battery (instant-on) output voltage vs temperature output voltage vs output current in suspend v bus current vs output current in suspend battery charge current vs v out output current (ma) 0 output voltage (v) 4.0 4.5 5.0 2 408812 g10 3.5 3.0 2.5 0.5 1 1.5 2.5 5x mode 1x mode v bus = 5v v bat = 3.3v r clprog = 2.94k output load current (ma) 0 v bus current (ma) 1.5 2.0 2.5 2 408812 g11 1.0 0.5 0 0.5 1 1.5 2.5 5x mode 1x mode v bus = 5v v bat = 3.3v r clprog = 2.94k v out (v) 3.1 0 charge current (ma) 100 200 300 400 500 600 3.2 3.3 3.4 3.5 408812 g12 3.6 r prog = 2k temperature ( c) ?40 0 charge current (ma) 100 200 300 400 0 40 80 120 408812 g13 500 600 ?20 20 60 100 thermal regulation r prog = 2k temperature (c) ?40 float voltage (v) 4.19 4.20 60 408812 g14 4.18 4.17 ?15 10 35 85 4.21 temperature (c) ?40 output voltage (v) 3.64 3.66 60 408812 g15 3.62 3.60 ?15 10 35 85 3.68 v bat = 2.7v i out = 100ma 5x mode temperature (c) ?40 frequency (mhz) 2.25 2.30 2.35 60 408812 g16 2.20 2.15 2.10 ?15 10 35 85 temperature (c) ?40 quiescent current (ma) 9 12 60 408812 g17 6 3 ?15 10 35 85 15 v bus = 5v i out = 0a 5x mode 1x mode temperature (c) ?40 34 quiescent current (ma) 36 38 40 42 44 46 ?15 10 35 60 408812 g18 85 v bus = 5v i out = 0ma susp hi
ltc 4088-1/ ltc 4088-2 7 40881fc typical p er f or m ance c harac t eris t ics t a = 25c, unless otherwise noted. chrg pin current vs voltage (pull-down state) suspend ldo transient response (500a to 1ma) chrg pin voltage (v) 0 chrg pin current (ma) 60 80 100 4 408812 g19 40 20 0 1 2 3 5 v bus = 5v v bat = 3.8v i out 500a/div 0ma 500s/div 408812 g20 v out 20mv/div ac-coupled p in func t ions ntc (pin 1): input to the ntc thermistor monitoring circuits. the ntc pin connects to a negative temperature coefficient thermistor which is typically co-packaged with the battery pack to determine if the battery is too hot or too cold to charge. if the batterys temperature is out of range, charging is paused until the battery temperature re- enters the valid range. a low drift bias resistor is required from v bus to ntc and a thermistor is required from ntc to ground. if the ntc function is not desired, the ntc pin should be grounded. clprog (pin 2): usb current limit program and monitor pin. a 1% resistor from clprog to ground determines the upper limit of the current drawn from the v bus pin. a precise fraction of the input current, h clprog , is sent to the clprog pin when the high side switch is on. the switching regulator delivers power until the clprog pin reaches 1.188 v. therefore, the current drawn from v bus will be limited to an amount given by h clprog and r clprog . there are several ratios for h clprog available, two of which correspond to the 500 ma and 100 ma usb specifications. a multilayer ceramic averaging capacitor is also required at clprog for filtering. v outs (pin 3): output voltage sense. the v outs pin is used to sense the voltage at v out when the powerpath switching regulator is in operation. v outs should always be connected directly to v out . d 2 (pin 4): mode select input pin. d2, in combination with the d0 pin and d1 pin, controls the current limit and bat- tery charger functions of the ltc4088-1/ltc4088-2. the ltc4088-1 and ltc4088-2 differ only in the functionality of the d2 pin default (0, 0, 0) state ( see table 1). this pin is pulled low by a weak current sink. c/x ( pin 5): end of charge indication program pin. this pin is used to program the current level at which a completed charge cycle is indicated by the chrg pin. prog (pin 6): charge current program and charge cur- rent monitor pin. connecting a 1% resistor from prog to ground programs the charge current. if sufficient input power is available in constant- current mode, this pin servos to 1 v. the voltage on this pin always represents the actual charge current by using the following formula: i bat = v prog r prog ? 1031
ltc 4088-1/ ltc 4088-2 8 40881fc p in func t ions chrg (pin 7): open-drain charge status output. the chrg pin indicates the status of the battery charger. four possible states are represented by chrg : charging, not charging ( or float charge current less than programmed end of charge indication current), unresponsive battery and battery temperature out of range. chrg is modulated at 35khz and switches between a low and a high duty cycle for easy recognition by either humans or microprocessors. chrg requires a pull-up resistor and/or led to provide indication. gate (pin 8): ideal diode amplifier output. this pin con- trols the gate of an external p-channel mosfet transistor used to supplement the internal ideal diode. the source of the p-channel mosfet should be connected to v out and the drain should be connected to bat . b at (pin 9): single cell li-ion battery pin. depending on available power and load, a li-ion battery on bat will either deliver system power to v out through the ideal diode or be charged from the battery charger. v out ( pin 10): output voltage of the switching powerpath controller and input voltage of the battery charger. the majority of the portable product should be powered from v out . the ltc4088-1/ltc4088-2 will partition the available power between the external load on v out and the internal battery charger. priority is given to the external load and any extra power is used to charge the battery. an ideal diode from bat to v out ensures that v out is powered even if the load exceeds the allotted power from v bus or if the v bus power source is removed. v out should be bypassed with a low impedance multilayer ceramic capacitor. v bus (pin 11): input voltage for the switching powerpath controller. v bus will usually be connected to the usb port of a computer or a dc output wall adapter. v bus should be bypassed with a low impedance multilayer ceramic capacitor. sw (pin 12): the sw pin delivers power from v bus to v out via the step-down switching regulator. an inductor should be connected from sw to v out . see the applica- tions information section for a discussion of inductance value and current rating. d0 (pin 13): mode select input pin. d0, in combina- tion with the d1 pin and the d2 pin, controls the current limit and battery charger functions of the ltc4088-1/ ltc4088 -2 ( see table 1). this pin is pulled low by a weak current sink. d 1 ( pin 14): mode select input pin. d1, in combination with the d0 pin and the d2 pin, controls the current limit and battery charger functions of the ltc4088-1/ltc4088-2 (see table 1). this pin is pulled low by a weak current sink. exposed pad ( pin 15): gnd. must be soldered to the pcb to provide a low electrical and thermal impedance connection to ground.
ltc 4088-1/ ltc 4088-2 9 40881fc b lock diagra m 13 1 + ? + ? + ? + ? + ? + ? + ? 0.1v undertemp average input current limit controller overtemp ntc v bus ntc t 2 clprog 11 v bus ntc fault d1 ntc enable 14 d2 4 d0 logic 1.188v + ? + + ? average output voltage limit controller osc pwm s pwm 4.6v 100mv suspend ldo i ldo /m i switch /n to usb or wall adpapter q r 3.6v 0.3v 1v 100mv ntc 408812 bd i bat /1031 i bat /1031 + ? + ? prog 6 gnd 15 5 c/x 7 9 bad cell chrg bat single cell li-ion external ideal diode pmos 8 gate 10 v out 3 v outs to system load constant current constant voltage battery charger + ? 0v 15mv ideal diode 12 sw nonoverlap and drive logic +
ltc 4088-1/ ltc 4088-2 10 40881fc o pera t ion introduction the ltc4088-1/ltc4088-2 includes a powerpath control - ler, battery charger, internal ideal diode, external ideal diode controller and a suspend ldo. designed specifically for usb applications, the powerpath controller incorporates a precision average input current limited step-down switch- ing regulator to make maximum use of the allowable usb power. because power is conserved, the ltc4088-1/ ltc4088-2 allows the load current on v out to exceed the current drawn by the usb port without exceeding the usb load specifications. the switching regulator and battery charger communicate to ensure that the average input current never exceeds the usb specifications. the ideal diodes from bat to v out guarantee that ample power is always available to v out even if there is insuf- ficient or absent power at v bus . finally, to prevent battery drain when a device is con- nected to a suspended usb port, an ldo from v bus to v out provides either low power or high power suspend current to the application. input current limited step down switching regulator the power delivered from v bus to v out is controlled by a 2.25 mhz constant frequency step-down switching regulator. to meet the usb maximum load specification, the switching regulator contains a measurement and control system that ensures that the average input cur- rent remains below the level programmed at clprog. v out drives the combination of the external load and the battery charger. if the combined load does not cause the switching power supply to reach the programmed input current limit, v out will track approximately 0.3 v above the battery voltage. by keeping the voltage across the battery charger at this low level, power lost to the battery charger is minimized. figure 1 shows the power path components. if the combined external load plus battery charge current is large enough to cause the switching power supply to reach the programmed input current limit, the battery charger will reduce its charge current by precisely the amount necessary to enable the external load to be satis- fied. even if the battery charge current is programmed to exceed the allowable usb current, the usb specification for average input current will not be violated; the battery charger will reduce its current as needed. furthermore, if the load current at v out exceeds the programmed power from v bus , load current will be drawn from the battery via the ideal diodes even when the battery charger is enabled. the current at clprog is a precise fraction of the v bus current. when a programming resistor and an averaging figure 1 + ? + + ? 0.3v 1.188v 3.6v clprog i switch /n + ? + ? 15mv ov ideal diode pwm and gate drive average input current limit controller average output voltage limit controller constant current constant voltage battery charger + ? 2 gate 8 v out 10 v outs 3 sw system load 3.5v to (bat + 0.3v) external ideal diode pmos single cell li-ion 408812 f01 12 bat 9 v bus to usb or wall adapter 11 +
ltc 4088-1/ ltc 4088-2 11 40881fc o pera t ion capacitor are connected from clprog to gnd, the voltage on clprog represents the average input current of the switching regulator. as the input current approaches the programmed limit, clprog reaches 1.188 v and power delivered by the switching regulator is held constant. several ratios of current are available which can be set to correspond to usb low and high power modes with a single programming resistor. the input current limit is programmed by various com- binations of the d0, d1 and d2 pins as shown in table 1. the switching input regulator can also be deactivated (usb suspend). the average input current will be limited by the clprog programming resistor according to the following expres- sion: i vbus = i busq + v clprog r clprog ? h clprog + 1 ( ) where i busq is the quiescent current of the ltc4088-1/ ltc4088-2, v clprog is the clprog servo voltage in current limit, r clprog is the value of the programming resistor and h clprog is the ratio of the measured current at v bus to the sample current delivered to clprog. refer to the electrical characteristics table for values of h clprog , v clprog and i busq . given worst-case circuit tolerances, the usb specification for the average input current in 1x or 5 x mode will not be violated, provided that r clprog is 2.94k or greater. table 1 shows the available settings for the d0, d1 and d2 pins. table 1. controlled input current limit d0 d1 4088-1 d2 4088-2 d2 charger status i bus(lim) 0 0 0 1 off 100ma (1x) 0 0 1 0 on 100ma (1x) 0 1 0 1 off 500ma (5x) 0 1 1 0 on 500ma (5x) 1 0 0 1 off 1a (10x) 1 0 1 0 on 1a (10x) 1 1 0 1 off 2.5ma (susp high) 1 1 1 0 off 500a (susp low) notice that when d0 is high and d1 is low, the switching regulator is set to a higher current limit for increased charging and power availability at v out . these modes will typically be used when there is line power available from a wall adapter. while not in current limit, the switching regulator s bat-track feature will set v out to approximately 300mv above the voltage at bat . however, if the voltage at bat is below 3.3 v, and the load requirement does not cause the switching regulator to exceed its current limit, v out will regulate at a fixed 3.6 v as shown in figure 2. this will allow a portable product to run immediately when power is applied without waiting for the battery to charge. if the load does exceed the current limit at v bus , v out will range between the no-load voltage and slightly below the batter y voltage, indicated by the shaded region of figure 2. for very low-battery voltages, the battery charger acts like a load and, due to limited input power, its current will tend to pull v out below the 3.6v instant on voltage. to prevent v out from falling below this level, an undervoltage circuit automatically detects that v out is falling and reduces the battery charge current as needed. this reduction ensures that load current and voltage are always prioritized and yet delivers as much battery charge current as possible . ( see over programming the battery charger in the applications information section). the voltage regulation loop compensation is controlled by the capacitance on v out . an mlcc capacitor of 10 f is required for loop stability. additional capacitance beyond this value will improve transient response. figure 2. v out vs b at bat (v) 2.4 4.5 4.2 3.9 3.6 3.3 3.0 2.7 2.4 3.3 3.9 408812 f02 2.7 3.0 3.6 4.2 v out (v) no load 300mv
ltc 4088-1/ ltc 4088-2 12 40881fc o pera t ion ideal diode from b at to v out the ltc4088-1/ltc4088-2 has an internal ideal diode as well as a controller for an external ideal diode. both the internal and the external ideal diodes are always on and will respond quickly whenever v out drops below bat . if the load current increases beyond the power allowed from the switching regulator, additional power will be pulled from the battery via the ideal diodes. furthermore, if power to v bus ( usb or wall power) is removed, then all of the application power will be provided by the bat- tery via the ideal diodes. the ideal diodes will be fast enough to keep v out from drooping with only the stor- age capacitance required for the switching regulator. the internal ideal diode consists of a precision amplifier that activates a large on-chip mosfet transistor whenever the voltage at v out is approximately 15mv (v fwd ) below the voltage at bat . within the amplifiers linear range, the small-signal resistance of the ideal diode will be quite low, keeping the forward drop near 15 mv. at higher current levels, the mosfet will be in full conduction. an external p-channel mosfet transistor should be added from b at to v out . the gate pin of the ltc4088-1/ltc4088-2 drives the gate of the external p-channel mosfet transistor for automatic ideal diode control. the source of the external p-channel mosfet should be connected to v out and the drain should be connected to bat . capable of driving a 1nf load, the gate pin can control an external p-channel mosfet transistor having an on-resistance of 30m or lower. when v bus is unavailable, the forward voltage of the ideal diode amplifier will be reduced from 15 mv to nearly zero. suspend ldo the ltc4088-1/ltc4088-2 provides a small amount of power to v out in suspend mode by including an ldo from v bus to v out . this ldo will prevent the battery from running down when the portable product has access to a suspended usb port. regulating at 4.6v , this ldo only becomes active when the switching converter is disabled. to remain compliant with the usb specification, the input to the ldo is current limited so that it will not exceed the low power or high power suspend specification. if the load on v out exceeds the suspend current limit, the additional current will come from the battery via the ideal diodes. the suspend ldo sends a scaled copy of the v bus current to the clprog pin, which will servo to approximately 100mv in this mode. thus, the high power and low power suspend settings are related to the levels programmed by the same resistor for 1 x and 5 x modes. v bus undervoltage lockout (uvlo) an internal undervoltage lockout circuit monitors v bus and keeps the switching regulator off until v bus rises above the rising uvlo threshold (4.3 v). if v bus falls below the falling uvlo threshold (4 v), system power at v out will be drawn from the battery via the ideal diodes. the voltage at v bus must also be higher than the voltage at bat by approxi- mately 170 mv for the switching regulator to operate. battery charger the ltc4088-1/ltc4088-2 includes a constant-current/ constant- voltage battery charger with automatic recharge, automatic termination by safety timer, low voltage trickle charging, bad cell detection and thermistor sensor input for out of temperature charge pausing. figure 3. ideal diode v-i characteristics forward voltage (mv) (bat ? v out ) 0 current (ma) 600 1800 2000 2200 120 240 300 408812 f03 200 1400 1000 400 1600 0 1200 800 60 180 360 480420 vishay si2333 external ideal diode ltc4088-1/ ltc4088-2 ideal diode on semiconductor mbrm120lt3 v bus = 5v
ltc 4088-1/ ltc 4088-2 13 40881fc o pera t ion when a battery charge cycle begins, the battery charger first determines if the battery is deeply discharged. if the battery voltage is below v trkl , typically 2.85v , an automatic trickle charge feature sets the battery charge current to 10% of the programmed value. if the low voltage persists for more than 1/2 hour, the battery charger automatically terminates and indicates, via the chrg pin, that the battery was unresponsive. once the battery voltage is above v trkl , the charger be- gins charging in full power constant-current mode. the current delivered to the battery will try to reach 1031v/ r prog . depending on available input power and external load conditions, the battery charger may or may not be able to charge at the full programmed rate. the external load will always be prioritized over the battery charge current. the usb current limit programming will always be observed and only additional power will be available to charge the battery. when system loads are light, battery charge current will be maximized. charge termination the battery charger has a built-in safety timer. once the voltage on the battery reaches the pre-programmed float voltage of 4.200 v, the charger will regulate the battery voltage there and the charge current will decrease naturally. once the charger detects that the battery has reached 4.200v, the 4- hour safety timer is started. after the safety timer expires, charging of the battery will discontinue and no more current will be delivered. automatic recharge once the battery charger terminates, it will remain off drawing only microamperes of current from the battery. if the portable product remains in this state long enough, the battery will eventually self discharge. to ensure that the battery is always topped off, a charge cycle will automati- cally begin when the battery voltage falls below v rechrg (typically 4.1 v). in the event that the safety timer is running when the battery voltage falls below v rechrg , it will reset back to zero. to prevent brief excursions below v rechrg from resetting the safety timer, the battery voltage must be below v rechrg for more than 1.5 ms. the charge cycle and safety timer will also restart if the v bus uvlo cycles low and then high ( e.g., v bus is removed and then replaced) or if the charger is momentarily disabled using the d2 pin. charge current the charge current is programmed using a single resistor from prog to ground . 1/1031 th of the battery charge cur- rent is delivered to prog, which will attempt to servo to 1.000v. thus, the battery charge current will try to reach 1031 times the current in the prog pin. the program resistor and the charge current are calculated using the following equations: r prog = 1031v i chg , i chg = 1031v r prog in either the constant- current or constant- voltage charging modes, the voltage at the prog pin will be proportional to the actual charge current delivered to the battery. the charge current can be determined at any time by monitoring the prog pin voltage and using the following equation: i bat = v prog r prog ? 1031 in many cases, the actual battery charge current, i bat , will be lower than the programmed current, i chg , due to limited input power available and prioritization to the system load drawn from v out . charge status indication the chrg pin indicates the status of the battery charger. four possible states are represented by chrg which include charging, not charging ( or float charge current less than programmed end of charge indication current), unresponsive battery and battery temperature out of range. the signal at the chrg pin can be easily recognized as one of the above four states by either a human or a mi- croprocessor. an open-drain output, the chrg pin can drive an indicator led through a current limiting resistor for human interfacing or simply a pull-up resistor for microprocessor interfacing.
ltc 4088-1/ ltc 4088-2 14 40881fc o pera t ion to make the chrg pin easily recognized by both humans and microprocessors, the pin is either a dc signal of on for charging, off for not charging or it is switched at high frequency (35 khz) to indicate the two possible faults. while switching at 35 khz, its duty cycle is modulated at a slow rate that can be recognized by a human. when charging begins, chrg is pulled low and remains low for the duration of a normal charge cycle. when charg- ing is complete, as determined by the criteria set by the c/x pin, the chrg pin is released ( hi-z). the chrg pin does not respond to the c/x threshold if the ltc4088-1/ ltc4088-2 is in v bus current limit. this prevents false end of charge indications due to insufficient power available to the battery charger. if a fault occurs while charging, the pin is switched at 35 khz. while switching, its duty cycle is modulated between a high and low value at a very low frequency. the low and high duty cycles are disparate enough to make an led appear to be on or off thus giv- ing the appearance of blinking. each of the two faults has its own unique blink rate for human recognition as well as two unique duty cycles for machine recognition. table 2 illustrates the four possible states of the chrg pin when the battery charger is active. table 2. chrg signal status frequency modulation (blink) frequency duty cycles charging 0hz 0hz (low z) 100% i bat < c/x 0hz 0hz (hi-z) 0% ntc fault 35khz 1.5hz at 50% 6.25% or 93.75% bad battery 35khz 6.1hz at 50% 12.5% or 87.5% notice that an ntc fault is represented by a 35khz pulse train whose duty cycle toggles between 6.25% and 93.75% at a 1.5 hz rate. a human will easily recognize the 1.5hz rate as a slow blinking which indicates the out of range battery temperature while a microprocessor will be able to decode either the 6.25% or 93.75% duty cycles as an ntc fault. if a battery is found to be unresponsive to charging ( i.e., its voltage remains below 2.85 v for 1/2 hour), the chrg pin gives the battery fault indication. for this fault, a hu- man would easily recognize the frantic 6.1hz fast blink of the led while a microprocessor would be able to decode either the 12.5% or 87.5% duty cycles as a bad cell fault. because the ltc4088-1/ltc4088-2 is a 3-terminal power - path product, system load is always prioritized over battery charging. due to excessive system load, there may not be sufficient power to charge the battery beyond the bad cell threshold voltage within the bad cell timeout period. in this case the battery charger will falsely indicate a bad cell. system software may then reduce the load and reset the battery charger to try again. although very improbable, it is possible that a duty cycle reading could be taken at the bright-dim transition (low duty cycle to high duty cycle). when this happens the duty cycle reading will be precisely 50%. if the duty cycle reading is 50%, system software should disqualify it and take a new duty cycle reading. c/x determination the current exiting the c/x pin represents 1/1031 th of the battery charge current. with a resistor from c/x to ground that is x/10 times the resistor at the prog pin, the chrg pin releases when the battery current drops to c/x. for example, if c/10 detection is desired, r c/x should be made equal to r prog . for c/20, r c/x would be twice r prog . the current threshold at which chrg will change state is given by: i bat = v c/x r c/x ? 103 1 with this design, c/10 detection can be achieved with only one resistor rather than a resistor for both the c/x pin and the prog pin. since both of these pins have 1/1031 of the battery charge current in them, their voltages will be equal when they have the same resistor value. therefore, rather than using two resistors, the c/x pin and the prog pin can be connected together and the resistors can be paralleled to a single resistor of 1/2 of the program resistor.
ltc 4088-1/ ltc 4088-2 15 40881fc o pera t ion ntc thermistor the battery temperature is measured by placing a negative temperature coefficient ( ntc) thermistor close to the bat- tery pack. the ntc circuitry is shown in the block diagram. to use this feature, connect the ntc thermistor, r ntc , between the ntc pin and ground and a bias resistor, r nom , from v bus to ntc. r nom should be a 1% resistor with a value equal to the value of the chosen ntc thermistor at 25c ( r25). a 100 k thermistor is recommended since thermistor current is not measured by the ltc4088-1/ ltc4088-2 and will have to be considered for usb com- pliance. the ltc4088-1/ltc4088-2 will pause charging when the resistance of the ntc thermistor drops to 0.54 times the value of r25 or approximately 54 k ( for a vishay curve 1 thermistor, this corresponds to approximately 40c). if the battery charger is in constant voltage ( float) mode, the safety timer also pauses until the thermistor indicates a return to a valid temperature. as the temperature drops, the resistance of the ntc thermistor rises. the ltc4088-1/ ltc4088-2 is also designed to pause charging when the value of the ntc thermistor increases to 3.25 times the value of r25. for a vishay curve 1 thermistor, this resistance , 325 k, corresponds to approximately 0 c. the hot and cold comparators each have approximately 3c of hysteresis to prevent oscillation about the trip point. grounding the ntc pin disables all ntc functionality. thermal regulation to prevent thermal damage to the ic or surrounding components, an internal thermal feedback loop will automatically decrease the programmed charge current if the die temperature rises to approximately 110c. thermal regulation protects the ltc4088-1/ltc4088-2 from excessive temperature due to high power operation or high ambient thermal conditions, and allows the user to push the limits of the power handling capability with a given circuit board design without risk of damaging the ltc4088-1/ltc4088-2 or external components. the benefit of the ltc4088-1/ltc4088-2 thermal regulation loop is that charge current can be set according to actual conditions rather than worst-case conditions for a given application with the assurance that the charger will au- tomatically reduce the current in worst-case conditions. shutdown mode the input switching regulator is enabled whenever v bus is above the uvlo voltage and the ltc4088-1/ltc4088- 2 is not in one of the two usb suspend modes (500a or 2.5ma). the ideal diode is enabled at all times and cannot be disabled.
ltc 4088-1/ ltc 4088-2 16 40881fc a pplica t ions i n f or m a t ion clprog resistor and capacitor as described in the step-down input regulator section, the resistor on the clprog pin determines the average input current limit in each of the six current limit modes. the input current will be comprised of two components, the current that is used to drive v out and the quiescent current of the switching regulator. to ensure that the usb specification is strictly met, both components of input cur- rent should be considered. the electrical characteristics table gives the typical values for quiescent currents in all settings as well as current limit programming accuracy. to get as close to the 500 ma or 100 ma specifications as possible, a precision resistor should be used. an averaging capacitor is required in parallel with the resistor so that the switching regulator can determine the average input current. this capacitor also provides the dominant pole for the feedback loop when current limit is reached. to ensure stability, the capacitor on clprog should be 0.47 f or larger. alternatively, faster transient response may be obtained with 0.1 f in series with 8.2. choosing the inductor because the average input current circuit does not measure reverse current ( i.e., current from v out to v bus ), cur- rent reversal in the inductor at light loads will contribute an error to the v bus current measurement. the error is conservative in that if the current reverses, the voltage at clprog will be higher than what would represent the actual average input current drawn. the current available for charging and the system load is thus reduced. the usb specification will not be violated. this reduction in available v bus current will happen when the peak-peak inductor ripple is greater than twice the average current limit setting. for example, if the average current limit is set to 100 ma, the peak-peak ripple should not exceed 200 ma. if the input current is less than 100ma, the measurement accuracy may be reduced, but it does not affect the average current loop since it will not be in regulation. the ltc4088-1/ltc4088-2 includes a current-reversal comparator which monitors inductor current and disables the synchronous rectifier as current approaches zero. this comparator will minimize the effect of current reversal on the average input current measurement. for some low inductance values, however, the inductor current may reverse slightly. this value depends on the speed of the comparator in relation to the slope of the current waveform, given by v l /l, where v l is the voltage across the inductor (approximately Cv out ) and l is the inductance value. an inductance value of 3.3 h is a good starting value. the ripple will be small enough for the regulator to remain in continuous conduction at 100 ma average v bus current. at lighter loads the current-reversal comparator will disable the synchronous rectifier at a current slightly above 0 ma. as the inductance is reduced from this value, the part will enter discontinuous conduction mode at progressively higher loads. ripple at v out will increase, directly proportionally to the magnitude of inductor ripple. transient response, however, will be improved. the current mode controller controls inductor current to exactly the amount required by the load to keep v out in regulation. a transient load step requires the inductor current to change to a new level. since inductor current cannot change instantaneously, the capacitance on v out delivers or absorbs the differ- ence in current until the inductor current can change to meet the new load demand. a smaller inductor changes its current more quickly for a given voltage drive than a larger inductor, resulting in faster transient response. a larger inductor will reduce output ripple and current ripple, but at the expense of reduced transient performance (or more c vout required) and a physically larger inductor package size. the input regulator has an instantaneous peak current clamp to prevent the inductor from saturating during tran- sient load or start-up conditions. the clamp is designed so that it does not interfere with normal operation at high loads with reasonable inductor ripple. it will prevent inductor current runaway in case of a shorted output. the dc winding resistance and ac core losses of the inductor will affect efficiency, and therefore available output power. these effects are difficult to characterize and vary by application. some inductors which may be suitable for this application are listed in table 3.
ltc 4088-1/ ltc 4088-2 17 40881fc a pplica t ions i n f or m a t ion v bus and v out bypass capacitors the style and value of capacitors used with the ltc4088 - 1/ltc4088-2 determine several important parameters such as regulator control-loop stability and input voltage ripple. because the ltc4088-1/ltc4088-2 uses a step-down switching power supply from v bus to v out , its input current waveform contains high fre- quency components. it is strongly recommended that a low equivalent series resistance ( esr) multilayer ce- ramic capacitor be used to bypass v bus . tantalum and aluminum capacitors are not recommended because of their high esr. the value of the capacitor on v bus directly controls the amount of input ripple for a given load current. increasing the size of this capacitor will reduce the input ripple. the usb specification allows a maximum of 10 f to be connected directly across the usb power bus. if additional capacitance is required for noise performance, a soft-connect circuit may be required to limit inrush current and avoid excessive transient voltage drops on the bus (see figure 5). to prevent large v out voltage steps during transient load conditions, it is also recommended that a ceramic capacitor be used to bypass v out . the output capacitor is used in the compensation of the switching regula- tor. at least 10 f with low esr are required on v out . additional capacitance will improve load transient performance and stability. multilayer ceramic chip capacitors typically have excep- tional esr performance. mlccs combined with a tight board layout and an unbroken ground plane will yield very good performance and low emi emissions. there are several types of ceramic capacitors avail- able each having considerably different characteristics. for example, x7r ceramic capacitors have the best voltage and temperature stability. x5r ceramic capacitors have apparently higher packing density but poorer performance over their rated voltage and temperature ranges. y5v ceramic capacitors have the highest packing density, but must be used with caution, because of their extreme nonlinear characteristic of capacitance versus voltage. the actual in-circuit capacitance of a ceramic capacitor should be measured with a small ac signal and dc bias as is expected in- circuit. many vendors specify the capacitance verse voltage with a 1v rms ac test signal and, as a result, over state the capacitance that the capacitor will present in the application. using similar operating conditions as the application, the user must measure or request from the vendor the actual capacitance to determine if the selected capacitor meets the minimum capacitance that the application requires. overprogramming the battery charger the usb high power specification allows for up to 2.5w to be drawn from the usb port. the switching regulator transforms the voltage at v bus to just above the voltage at bat with high efficiency, while limiting power to less than the amount programmed at clprog. the charger should be programmed ( with the prog pin) to deliver the maximum safe charging current without regard to the usb specifications. if there is insufficient current available to charge the battery at the programmed rate, it will reduce charge current until the system load on v out is satisfied and the v bus current limit is satisfied. programming the table 3. recommended inductors for the ltc4088-1/ltc4088-2 inductor type l (h) max i dc (a) max dcr () size in mm (l w h) manufacturer lps4018 3.3 2.2 0.08 3.9 3.9 1.7 coilcraft www.coilcraft.com d53lc db318c 3.3 3.3 2.26 1.55 0.034 0.070 5 5 3 3.8 3.8 1.8 toko www.toko.com we-tpc type m1 3.3 1.95 0.065 4.8 4.8 1.8 wrth elektronik www.we-online.com cdrh6d12 cdrh6d38 3.3 3.3 2.2 3.5 0.0625 0.020 6.7 6.7 1.5 7 7 4 sumida www.sumida.com
ltc 4088-1/ ltc 4088-2 18 40881fc a pplica t ions i n f or m a t ion charger for more current than is available will not cause the average input current limit to be violated. it will merely allow the battery charger to make use of all available power to charge the battery as quickly as possible, and with minimal power dissipation within the charger. alternate ntc thermistors and biasing the ltc4088-1/ltc4088-2 provides temperature quali- fied charging if a grounded thermistor and a bias resistor are connected to ntc. by using a bias resistor whose value is equal to the room temperature resistance of the thermistor ( r25) the upper and lower temperatures are pre-programmed to approximately 40 c and 0 c, respec- tively (assuming a vishay curve 1 thermistor). the upper and lower temperature thresholds can be ad- justed by either a modification of the bias resistor value or by adding a second adjustment resistor to the circuit. if only the bias resistor is adjusted, then either the upper or the lower threshold can be modified but not both. the other trip point will be determined by the characteristics of the thermistor. using the bias resistor in addition to an adjustment resistor, both the upper and the lower tempera- ture trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease. examples of each technique are given below. ntc thermistors have temperature characteristics which are indicated on resistance - temperature conversion tables . the vishay-dale thermistor nths0603n01n1003, used in the following examples, has a nominal value of 100k and follows the vishay curve 1 resistance-temperature characteristic. in the explanation below, the following notation is used. r25 = value of the thermistor at 25c r ntc|cold = value of thermistor at the cold trip point r ntc|hot = value of the thermistor at the hot trip point r cold = ratio of r ntc|cold to r25 r hot = ratio of r ntc|cold to r25 r nom = primary thermistor bias resistor ( see figure 4a) r1 = optional temperature range adjustment resistor (see figure 4b) the trip points for the ltc4088-1/ltc4088-2s tempera- ture qualification are internally programmed at 0.349 ? v bus for the hot threshold and 0.765 ? v bus for the cold threshold. therefore, the hot trip point is set when: r ntc|hot r nom + r ntc|hot ? v bus = 0.349 ? v bus and the cold trip point is set when: r ntc|cold r nom + r ntc|cold ? v bus = 0.765 ? v bus solving these equations for r ntc|cold and r ntc|hot results in the following: r ntc|hot = 0.536 ? r nom and r ntc|cold = 3.25 ? r nom by setting r nom equal to r25, the above equations result in r hot = 0.536 and r cold = 3.25. referencing these ratios to the vishay resistance-temperature curve 1 chart gives a hot trip point of about 40 c and a cold trip point of about 0c. the difference between the hot and cold trip points is approximately 40c. by using a bias resistor, r nom , different in value from r25, the hot and cold trip points can be moved in either direc- tion. the temperature span will change somewhat due to the non-linear behavior of the thermistor . the following equations can be used to easily calculate a new value for the bias resistor: r nom = r hot 0.536 ? r25 r nom = r cold 3.25 ? r25 where r hot and r cold are the resistance ratios at the de- sired hot and cold trip points. note that these equations are linked. therefore, only one of the two trip points can
ltc 4088-1/ ltc 4088-2 19 40881fc a pplica t ions i n f or m a t ion be chosen, the other is determined by the default ratios designed in the ic. consider an example where a 60c hot trip point is desired. from the vishay curve 1 r-t characteristics, r hot is 0.2488 at 60 c. using the above equation, r nom should be set to 46.4k. with this value of r nom , the cold trip point is about 16c. notice that the span is now 44 c rather than the previous 40c. this is due to the decrease in temperature gain of the thermistor as absolute temperature increases. the upper and lower temperature trip points can be inde- pendently programmed by using an additional bias resistor as shown in figure 4 b. the following formulas can be used to compute the values of r nom and r1: r nom = r cold C r hot 2.714 ? r25 r1 = 0.536 ? r nom C r hot ? r25 for example, to set the trip points to 0 c and 45 c with a vishay curve 1 thermistor choose: r nom = 3.266 ? 0.4368 2.714 ? 100k = 104.2k the nearest 1% value is 105k: r1 = 0.536 ? 105 k C 0.4368 ? 100k = 12.6k the nearest 1% value is 12.7 k. the final solution is shown in figure 4 b and results in an upper trip point of 45 c and a lower trip point of 0c. usb inrush limiting the usb specification allows at most 10 f of downstream capacitance to be hot-plugged into a usb hub. in most ltc4088-1/ltc4088-2 applications , 10 f should be enough to provide adequate filtering on v bus . if more capacitance is required, the following circuit can be used to soft-connect additional capacitance. figure 5. usb soft-connect circuit figure 4. ntc circuits ? + ? + r nom 100k r ntc 100k ntc 0.1v ntc_enable 408812 f04a ltc4088-1 /ltc4088-2 ntc block too_cold too_hot 0.765 ? v bus 0.349 ? v bus ? + 1 v bus v bus t ? + ? + r nom 105k r ntc 100k r1 12.7k ntc v bus v bus 0.1v ntc_enable 408812 f04b too_cold too_hot 0.765 ? v bus 0.349 ? v bus ? + 1 ltc4088-1 /ltc4088-2 ntc block t r1 40k 5v usb input 408812 f05 c1 100nf c2 mp1 si2333 usb cable v bus gnd ltc4088-1/ ltc4088-2 (a) (b)
ltc 4088-1/ ltc 4088-2 20 40881fc a pplica t ions i n f or m a t ion in this circuit, capacitor c1 holds mp1 off when the cable is first connected. eventually the bottom plate of c1 dis- charges to gnd, applying increasing gate support to mp1. the long time constant of r1 and c1 prevent the current from building up in the cable too fast, thus dampening out any resonant overshoot. voltage overshoot on v bus may sometimes be observed when connecting the ltc4088-1/ltc4088-2 to a lab power supply. this overshoot is caused by long leads from the power supply to v bus . twisting the wires together from the supply to v bus can greatly reduce the parasitic induc- tance of these long leads, and keep the voltage at v bus to safe levels. usb cables are generally manufactured with the power leads in close proximity, and thus fairly low parasitic inductance. board layout considerations the exposed pad on the backside of the ltc4088-1/ ltc4088-2 package must be securely soldered to the pc board ground. this is the only ground pin in the pack- age, and it serves as the return path for both the control circuitry and the synchronous rectifier. furthermore, due to its high frequency switching circuitry, it is imperative that the input capacitor, inductor, and output capacitor be as close to the ltc4088-1/ltc4088-2 as possible and that there be an unbroken ground plane under the ltc4088-1/ltc4088-2 and all of its external high frequency components. high frequency currents, such as the input current on the ltc4088-1/ltc4088-2, tend to find their way on the ground plane along a mirror path directly beneath the incident path on the top of the board. if there are slits or cuts in the ground plane due to other traces on that layer, the current will be forced to go around the slits. if high frequency currents are not allowed to flow back through their natural least-area path, exces- sive voltage will build up and radiated emissions will occur (see figure 6). there should be a group of vias directly under the grounded backside leading directly down to an internal ground plane. to minimize parasitic inductance, the ground plane should be as close as possible to the top plane of the pc board (layer 2). the gate pin for the external ideal diode controller has extremely limited drive current. care must be taken to minimize leakage to adjacent pc board traces . 100na of leakage from this pin will introduce an additional offset to the ideal diode of approximately 10mv. to minimize leakage, the trace can be guarded on the pc board by surrounding it with v out connected metal, which should generally be less than one volt higher than gate. figure 6. ground currents follow their incident path at high speed. slices in the ground plane cause high voltage and increased emissions 408812 f06
ltc 4088-1/ ltc 4088-2 21 40881fc a pplica t ions i n f or m a t ion battery charger stability considerations the ltc4088-1/ltc4088-2 s battery charger contains both a constant- voltage and a constant- current control loop. the constant-voltage loop is stable without any compensation when a battery is connected with low impedance leads. excessive lead length, however, may add enough series inductance to require a bypass capacitor of at least 1f from bat to gnd. high value, low esr multilayer ceramic chip capacitors reduce the constant-voltage loop phase margin, possibly resulting in instability. ceramic capacitors up to 22f may be used in parallel with a battery, but larger ceramics should be decoupled with 0.2 to 1 of series resistance. furthermore, a 4.7 f capacitor in series with a 0.2 to 1 resistor from bat to gnd is required to prevent oscillation when the battery is disconnected. in constant-current mode, the prog pin is in the feed- back loop rather than the battery voltage. because of the additional pole created by any prog pin capacitance, capacitance on this pin must be kept to a minimum. with no additional capacitance on the prog pin, the charger is stable with program resistor values as high as 25k. however, additional capacitance on this node reduces the maximum allowed program resistor. the pole frequency at the prog pin should be kept above 100 khz. therefore, if the prog pin has a parasitic capacitance, c prog , the fol- lowing equation should be used to calculate the maximum resistance value for r prog : r prog 1 2 ? 100khz ? c prog typical a pplica t ion high efficiency battery charger/usb power manager with ntc qualified charging and reverse input protection + v bus li-ion v out c1 10f 0805 wall m2 usb c2 0.1f 0603 c3 10f 0805 l1 3.3h m1 load r3 2.94k r1 100k r2 100k r4 499 r5 8.2 c1, c3: murata grm21br61a106ke19 c2: murata grm188r71c104ka01 l1: coilcraft lps4018-332mlc m1, m2: siliconix si2333 r2: vishay-dale nths0603n01n1003 408812 ta02 clprog prog ltc4088-1/ ltc4088-2 c/x gnd sw d0 d1 d2 chrg ntc v outs gate bat c t
ltc 4088-1/ ltc 4088-2 22 40881fc de package 14-lead plastic dfn (4mm 3mm) (reference ltc dwg # 05-08-1708 rev b) 3.00 0.10 (2 sides) 4.00 0.10 (2 sides) note: 1. drawing proposed to be made variation of version (wged-3) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.70 0.10 0.75 0.05 r = 0.115 typ r = 0.05 typ 3.00 ref 1.70 0.05 1 7 14 8 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (de14) dfn 0806 rev b pin 1 notch r = 0.20 or 0.35 45 chamfer 3.00 ref recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 2.20 0.05 0.70 0.05 3.60 0.05 package outline 0.25 0.05 0.25 0.05 0.50 bsc 3.30 0.05 3.30 0.10 0.50 bsc de package 14-lead plastic dfn (4mm 3mm) (reference ltc dwg # 05-08-1708 rev b) p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings.
ltc 4088-1/ ltc 4088-2 23 40881fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory (revision history begins at rev c) rev date description page number c 05/12 clarified usb limited battery charge current curves. clarified thermistor part number. 5 18, 21
ltc 4088-1/ ltc 4088-2 24 40881fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2007 lt 0512 rev c ? printed in usa r ela t e d p ar t s part number description comments battery chargers ltc4057 lithium-ion linear battery charger up to 800ma charge current, thermal regulation, thinsot? package ltc4058 standalone 950ma lithium-ion charger in dfn c/10 charge termination, battery kelvin sensing, 7% charge accuracy ltc4065/ltc4065a 750ma linear lithium-ion battery charger 2mm 2mm dfn package, thermal regulation, standalone operation ltc4411/ltc4412 low loss single powerpath controllers in thinsot automatic switching between dc sources, load sharing, replaces oring diodes ltc4413 dual ideal diodes 3mm 3mm dfn package, low loss replacement for oring diodes power management ltc3406/ltc3406a 600ma (i out ), 1.5mhz, synchronous step-down dc/dc converter 95% efficiency, v in : 2.5v to 5.5v, v out = 0.6v, i q = 20a, i sd < 1a, thinsot package ltc3411 1.25a (i out ), 4mhz, synchronous step-down dc/dc converter 95% efficiency, v in : 2.5v to 5.5v, v out = 0.8v, i q = 60a, i sd < 1a, ms10 package ltc3455 dual dc/dc converter with usb power manager and li-ion battery charger seamless transition between power sources: usb, wall adapter and battery; 95% efficient dc/dc conversion ltc3557/ltc3557-1 usb power manager with li-ion/polymer charger, triple synchronous buck converter + ldo complete multi-function pmic: linear power manager and three buck regulators, charge current programmable up to 1.5a from wall adapter input , thermal regulation, synchronous buck converters efficiency: >95%, adj outputs: 0.8v to 3.6v at 400ma/400ma/600ma, bat-t rack adaptive output control, 200m ideal diode, 4mm 4mm qfn-28 package. ltc4055 usb power controller and battery charger charges single-cell li-ion batteries directly from a usb port, thermal regulation, 200m ideal diode, 4mm 4mm qfn-16 package ltc4066 usb power controller and battery charger charges single-cell li-ion batteries directly from a usb port, thermal regulation, 50m ideal diode, 4mm 4mm qfn-24 package ltc4085 usb power manager with ideal diode controller and li-ion charger charges single-cell li-ion batteries directly from a usb port, thermal regulation, 200m ideal diode with <50m option, 4mm 3mm dfn-14 package ltc4088 high efficiency usb power manager and battery charger maximizes available power from usb port, bat-track, instant-on operation, 1.5a max charge current, 180m ideal diode with <50m option, 3.3v/25ma always-on ldo, 4mm 3mm dfn-14 package ltc4089/ltc4089-5 usb power manager with ideal diode controller and high efficiency li-ion battery charger high efficiency 1.2a charger from 6v to 36v (40v max) input. charges single-cell li-ion/polymer batteries directly from a usb port, thermal regulation, 200m ideal diode with <50m option, 4mm 3mm dfn-14 package . bat-t rack adaptive output control (ltc4089), fixed 5v output (ltc4089-5)

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